Fourth International Workshop on Hardware/Software Co-Design, Codes/CASHE '96

Fourth International Workshop on Hardware/Software Co-Design, Codes/CASHE '96

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... inlval in2val FuzzyMainf EvalRule X Busl| boa ii|8 Block2 standard processor i386 Min ! wires: 27 tmr2 n mrl mr2 Block:3L- memory mlOO (b) Fig. ... For example, the size metric (instructions) for a processor node is determined as the sum of the sizes of the children nodes. ... The examples represent a mix of control and control/data systems, with a variety of sizes ranging from 222 to 1021 lines of VHDL, anbsp;...


Title:Fourth International Workshop on Hardware/Software Co-Design, Codes/CASHE '96
Author: Donald E. Thomas, Rolf Ernst, IEEE Computer Society
Publisher:IEEE - 1996
ISBN-13:

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